Drive innovation as a Senior Digital Design Engineer at NXP in Chandler, Arizona. Collaborate with a dynamic team on complex System-on-Chip projects for cutting-edge technologies.

In this pivotal role, you will leverage expertise in USB standards and specifications, including USBPD and I2C. Your experience in RTL design using Verilog/SystemVerilog will help you develop digital IPs for mixed-signal SoCs. A strong emphasis on collaboration, you will work with architects and software teams to ensure integration success.

Key Responsibilities:
• Micro-architect features and IP implementation details
• Conduct RTL design for low-power performance
• Perform IP-level design verification and debugging
• Participate in timing analysis and DFT implementation
• Generate detailed design documentation and conduct reviews

Requirements:
• Master's degree in relevant Digital Design field
• 3+ years of experience in digital...