Your Gateway to Student Success
As a Standard Cell Layout Designer, you will work with highly standardized layout blocks—the “lego pieces” of digital CMOS circuit libraries. Your main responsibility is to assemble and optimize these blocks according to strict design rules so that every cell fits together perfectly, without gaps or mismatches.
This team differs from custom analog layout groups: the focus is on systematic, rule-based work, precision, and layout consistency across large-scale libraries used in advanced semiconductor technologies.
You will work closely with global engineering teams, follow detailed specifications, and grow your skills in layout methodologies, CAD tools, scripting, and advanced semiconductor nodes.
Wha...